Abstract:
As the end of Semiconductor Industry Association (SIA) roadmap is being approached, the double gate devices are considered to be one of the most promising technologies for the future microelectronics industry due to its excellent immunity to short channel effects and higher drive on current. Bulk CMOS devices scaled beyond 100nm regime gives rise to short-channel effects, a major concern. The double gate or multi gate devices provide better scalability option due to its excellent immunity to short-channel effects. Among the other advantages of DG MOSFETs are 60mV/dec subthreshold slope and the possibility of using lightly doped or un-doped body. The use of un-doped body also results in enhanced mobility of the charge carriers and elimination of statistical fluctuation of dopant concentration. Due to rigorous scaling advantages, CMOS has become a viable option for analog & RF applications and RF system-on-chip. To improve the performance of DG MOSFETs, various approaches such as the channel engineering using halo implantation and gate work-function engineering have been proposed. A systematic investigation, with the help of extensive simulations, the effects of gate and channel engineering on the analog performance and Radio Frequency applications of symmetric double gate silicon-on-insulator (SOI) MOSFETs is reported.
Coffee and tea will be served 20 minutes prior to the seminar.