Abstract:
The talk presents the modeling of new generation of devices using semiconductor nanostructures based on the Integrated Circuit Technology involving Silicon CMOS. The performance of nano-crystallites and nano-tubes embedded in different dielectric constants gate oxides of CMOS will be discussed. The effect of tunneling through the thin layer of the embedded gate oxides will be discussed in view of memory device applications.
Coffee and tea will be served 20 minutes prior to the seminar