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Large scale PLD high-κ (Ga,Cu) co-doped ZnO gate dielectric in SnS2 FETs

Speaker Ms. Jing YU
Affiliation The University of Hong Kong
Date January 28, 2022 (Friday)
Time 2:30 p.m.
Venue Seminar Room 522, 5/F, Chong Yuet Ming Physics Building

Abstract

High κ dielectrics, such as HfO2, Al2O3 and so on, are widely used to preserve the properties of two-dimensional (2D) semiconductors in electronic devices. However, fabricating these materials on the wafer scale and integrating them with 2D semiconductors is challenging because their synthesis typically requires mechanical exfoliation or not enough high κ or expensive. Here, we show that a high-κ (Ga, Cu) co-doped ZnO dielectric can be created on wafer scale via pulsed laser deposition. Ga0.5Cu2Zn97.5O film with large κ=56 and Al2O3 film with large band gap are selected to fabricate bilayer composite dielectric films. Ga0.5Cu2Zn97.5O/Al2O3 gate dielectric stack combine the advantages of both Ga0.5Cu2Zn97.5O and Al2O3 films. We demonstrate that gate stack is more favorable for transistors than single dielectric, featuring for a large κ (45.63) and a lower leakage current. Tin disulfide (SnS2) field-effect transistors supported by Al2O3/Ga0.5Cu2Zn97.5O dielectric stack to meet the requirement of energy band structure of gate dielectrics, which shows mobility 2.455 cm2/Vs. And we apply trap-assisted tunneling model to fit the gate current vs gate electric field. Tunneling currents have been calculated as a function of gate voltage for different structures.

Anyone interested is welcome to attend.