Abstract
Silicon Carbide (SiC) is a critical wide bandgap semiconductor for high-power electronics; however, its performance is severely constrained by the poor quality of the SiC/SiO₂ interface in metal oxide semiconductor field effect transistors. The conventional thermal oxidation process inevitably leaves residual carbon atoms and clusters, which diffuse into the channel and cause significant degradation in channel mobility and instability in threshold voltage.
To overcome this fundamental limitation, this research proposes an alternative gate dielectric fabrication strategy: replacing thermal oxidation with a deposition-based approach. Specifically, we introduce a high-κ Al₂O₃/SiO₂ gate stack fabricated entirely via Atomic Layer Deposition (ALD). Unlike thermal oxidation, ALD effectively eliminates the primary source of carbon-related defects. The proposed structure incorporates an ultra-thin ALD-grown SiO₂ interlayer to minimize lattice mismatch, capped with a high-κ Al₂O₃ layer to suppress gate leakage and enhance dielectric breakdown strength. By optimizing deposition parameters and post-deposition annealing (PDA) conditions, this work aims to improve interface quality, then enhancing channel mobility and reliability for SiC power devices.
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